Question

ideally, a dc load line is a straight line drawn on the collector characteristic curves between
select one:
○ a. ( i_b = 0 ) and ( i_b = i_c/\beta_{dc} )
○ b. the q-point and saturation
○ c. ( v_{ce(cutoff)} ) and ( i_{c(sat)} )
○ d. the q-point and cutoff

Explanation:

The DC load line is drawn between the cutoff and saturation points of a transistor. At cutoff, \(I_C = 0\) and \(V_{CE}=V_{CE(cutoff)}\) (which is equal to the supply voltage \(V_{CC}\) in a common - emitter configuration). At saturation, \(V_{CE}\) is very small (\(V_{CE(sat)}\approx0\)) and \(I_C = I_{C(sat)}\).

Answer:

C. \(VCE(cutoff)\) and \(IC(sat)\)